Run-time instruction set selection in a transmutable embedded processor

Lars Bauer, Muhammad Shafique, Jörg Henkel

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

We are presenting a new concept of an application-specific processor that is capable of transmuting its instruction set according to non-predictive application behavior during run-time. In those scenarios, current (extensible) embedded processors are less efficient since they are not run-time adaptive. We have identified the instruction set selection to be a critical step to perform at run time and hence we focus this paper on that crucial part. Our paradigm conducts as many steps as possible at compile/design time and as little as necessary at run time with the constraint to provide a sufficient flexibility to react to non-predictive application behavior efficiently. We provide an in-depth analysis of our scheme and achieve a speed-up of up to 7.19× (average: 3.63×) compared to state-of-the-art adaptive approaches (like 19). As an application, we have employed a whole H.264 video encoder though our scheme is by principle applicable to many other embedded applications. Our results are evaluated by an implementation of the instruction set selection for our transmutable processor on an FPGA platform.

Original languageEnglish (US)
Title of host publicationProceedings of the 45th Design Automation Conference, DAC
Pages56-61
Number of pages6
DOIs
StatePublished - 2008
Event45th Design Automation Conference, DAC - Anaheim, CA, United States
Duration: Jun 8 2008Jun 13 2008

Publication series

NameProceedings - Design Automation Conference
ISSN (Print)0738-100X

Conference

Conference45th Design Automation Conference, DAC
CountryUnited States
CityAnaheim, CA
Period6/8/086/13/08

Keywords

  • ASIP
  • Extensible embedded processors
  • Reconfigurable computing
  • Run-time adaptation
  • Special instruction

ASJC Scopus subject areas

  • Hardware and Architecture
  • Control and Systems Engineering

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