Safeguarding the Silicon: Strategies for Integrated Circuit Layout Protection

Jitendra Bhandari; Jayanth Gopinath; Mohammed Ashraf; Johann Knechtel; Ozgur Sinanoglu; Ramesh Karri

doi:10.1109/APCCAS62602.2024.10808337

Safeguarding the Silicon: Strategies for Integrated Circuit Layout Protection

Jitendra Bhandari, Jayanth Gopinath, Mohammed Ashraf, Johann Knechtel, Ozgur Sinanoglu, Ramesh Karri

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Modern integrated circuit (IC) production involves a complex supply chain with security risks like Trojans, physical probing or manipulation. We propose DEFense, an extensible computer-aided design (CAD) framework that aims for 'security closure' at the physical-layout level, balancing security with traditional power, performance, and area (PPA) goals. DEFense automates vulnerability assessment for IC layouts, guiding CAD tools in adjusting placement, routing, and applying other defense methods. DEFense is offered to the community [1].

Original language	English (US)
Title of host publication	APCCAS and PrimeAsia 2024 - 2024 IEEE 20th Asia Pacific Conference on Circuits and Systems and IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics Electronics, Proceeding
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	466-470
Number of pages	5
ISBN (Electronic)	9798350378771
DOIs	https://doi.org/10.1109/APCCAS62602.2024.10808337
State	Published - 2024
Event	20th IEEE Asia Pacific Conference on Circuits and Systems and IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics Electronics, APCCAS and PrimeAsia 2024 - Taipei, Taiwan, Province of China Duration: Nov 7 2024 → Nov 9 2024

Publication series

Name	APCCAS and PrimeAsia 2024 - 2024 IEEE 20th Asia Pacific Conference on Circuits and Systems and IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics Electronics, Proceeding

Conference

Conference	20th IEEE Asia Pacific Conference on Circuits and Systems and IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics Electronics, APCCAS and PrimeAsia 2024
Country/Territory	Taiwan, Province of China
City	Taipei
Period	11/7/24 → 11/9/24

Keywords

Hardware Security
Physical Design
Probing Attacks
Security Assessment
Trojans

ASJC Scopus subject areas

Artificial Intelligence
Hardware and Architecture
Electrical and Electronic Engineering
Safety, Risk, Reliability and Quality
Instrumentation

Access to Document

10.1109/APCCAS62602.2024.10808337

Cite this

Bhandari, J., Gopinath, J., Ashraf, M., Knechtel, J., Sinanoglu, O., & Karri, R. (2024). Safeguarding the Silicon: Strategies for Integrated Circuit Layout Protection. In APCCAS and PrimeAsia 2024 - 2024 IEEE 20th Asia Pacific Conference on Circuits and Systems and IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics Electronics, Proceeding (pp. 466-470). (APCCAS and PrimeAsia 2024 - 2024 IEEE 20th Asia Pacific Conference on Circuits and Systems and IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics Electronics, Proceeding). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/APCCAS62602.2024.10808337

Safeguarding the Silicon: Strategies for Integrated Circuit Layout Protection. / Bhandari, Jitendra; Gopinath, Jayanth; Ashraf, Mohammed et al.
APCCAS and PrimeAsia 2024 - 2024 IEEE 20th Asia Pacific Conference on Circuits and Systems and IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics Electronics, Proceeding. Institute of Electrical and Electronics Engineers Inc., 2024. p. 466-470 (APCCAS and PrimeAsia 2024 - 2024 IEEE 20th Asia Pacific Conference on Circuits and Systems and IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics Electronics, Proceeding).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Bhandari, J, Gopinath, J, Ashraf, M, Knechtel, J, Sinanoglu, O & Karri, R 2024, Safeguarding the Silicon: Strategies for Integrated Circuit Layout Protection. in APCCAS and PrimeAsia 2024 - 2024 IEEE 20th Asia Pacific Conference on Circuits and Systems and IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics Electronics, Proceeding. APCCAS and PrimeAsia 2024 - 2024 IEEE 20th Asia Pacific Conference on Circuits and Systems and IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics Electronics, Proceeding, Institute of Electrical and Electronics Engineers Inc., pp. 466-470, 20th IEEE Asia Pacific Conference on Circuits and Systems and IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics Electronics, APCCAS and PrimeAsia 2024, Taipei, Taiwan, Province of China, 11/7/24. https://doi.org/10.1109/APCCAS62602.2024.10808337

Bhandari J, Gopinath J, Ashraf M, Knechtel J, Sinanoglu O , Karri R. Safeguarding the Silicon: Strategies for Integrated Circuit Layout Protection. In APCCAS and PrimeAsia 2024 - 2024 IEEE 20th Asia Pacific Conference on Circuits and Systems and IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics Electronics, Proceeding. Institute of Electrical and Electronics Engineers Inc. 2024. p. 466-470. (APCCAS and PrimeAsia 2024 - 2024 IEEE 20th Asia Pacific Conference on Circuits and Systems and IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics Electronics, Proceeding). doi: 10.1109/APCCAS62602.2024.10808337

Bhandari, Jitendra ; Gopinath, Jayanth ; Ashraf, Mohammed et al. / Safeguarding the Silicon : Strategies for Integrated Circuit Layout Protection. APCCAS and PrimeAsia 2024 - 2024 IEEE 20th Asia Pacific Conference on Circuits and Systems and IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics Electronics, Proceeding. Institute of Electrical and Electronics Engineers Inc., 2024. pp. 466-470 (APCCAS and PrimeAsia 2024 - 2024 IEEE 20th Asia Pacific Conference on Circuits and Systems and IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics Electronics, Proceeding).

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Safeguarding the Silicon: Strategies for Integrated Circuit Layout Protection

Abstract

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Conference

Keywords

ASJC Scopus subject areas

Access to Document

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