SCRAMBLE: A Secure and Configurable, Memristor-Based Neuromorphic Hardware Leveraging 3D Architecture

Nikhil Rangarajan, Satwik Patnaik, Mohammed Nabeel, Mohammed Ashraf, Shubham Rai, Gopal Raut, Heba Abunahla, Baker Mohammad, Santosh Kumar Vishvakarma, Akash Kumar, Johann Knechtel, Ozgur Sinanoglu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In this work we present SCRAMBLE, a configurable neuromorphic architecture that provides security against different threats by employing memristors for critical parts and functions. More specifically, we employ memristive memory cells - that are 3D stacked on top of the configurable neuromorphic hardware - to securely hold the weights as well as activation functions of any model processed on the generalized architecture. Thus, programmable memristive cells enable reconfiguration of the architecture to thwart both model stealing and hardware IP stealing attacks. We implement a proof-of-concept for the proposed architecture and analyze its security metrics. We also benchmark it against selected prior art for neuromorphic architectures to quantify the security-performance trade-offs.

Original languageEnglish (US)
Title of host publicationProceedings - 2022 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2022
PublisherIEEE Computer Society
Pages308-313
Number of pages6
ISBN (Electronic)9781665466059
DOIs
StatePublished - 2022
Event2022 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2022 - Pafos, Cyprus
Duration: Jul 4 2022Jul 6 2022

Publication series

NameProceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI
Volume2022-July
ISSN (Print)2159-3469
ISSN (Electronic)2159-3477

Conference

Conference2022 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2022
Country/TerritoryCyprus
CityPafos
Period7/4/227/6/22

ASJC Scopus subject areas

  • Hardware and Architecture
  • Control and Systems Engineering
  • Electrical and Electronic Engineering

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