Secure and flexible trace-based debugging of systems-on-chip

Jerry Backer, David Hely, Ramesh Karri

Research output: Contribution to journalArticlepeer-review


This work tackles the conflict between enforcing security of a system-on-chip (SoC) and providing observability during trace-based debugging. On one hand, security objectives require that assets remain confidential at different stages of the SoC life cycle. On the other hand, the trace-based debug infrastructure exposes values of internal signals that can leak the assets to untrusted third parties. We propose a secure trace-based debug infrastructure to resolve this conflict. The secure infrastructure tags each asset to identify its owner (to whom it can be exposed during debug) and nonintrusively enforces the confidentiality of the assets during runtime debug. We implement a prototype of the enhanced infrastructure on an FPGA to validate its functional correctness. ASIC estimations show that our approach incurs practical area and power costs.

Original languageEnglish (US)
Article number31
JournalACM Transactions on Design Automation of Electronic Systems
Issue number2
StatePublished - Dec 2016


  • Debug traces
  • Secure debug
  • Security and privacy → embedded systems security
  • System-on-chip

ASJC Scopus subject areas

  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering


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