Secure design-for-debug for Systems-on-Chip

Jerry Backer, David Hely, Ramesh Karri

Research output: Chapter in Book/Report/Conference proceedingConference contribution


This work tackles the conflict between security and debugging of modern Systems-on-Chip (SoC). On one hand, security objectives require confidentiality of assets such as cryptographic keys, configuration and calibration data, and proprietary firmware. On the other hand, debugging instrumentation enables tracing of internal SoC signals that expose these assets via a debug port or debug memory. Mechanisms proposed to tackle this conflict either disable debugging before the SoC is released, or provide binary (all-or-nothing) access to the debugging instrumentation based on an authentication mechanism. The first approach is not practical because the debugging instrumentation is needed for in-field maintenance. The second approach does not protect against a rogue insider in a debugging team. We enhance the debugging instrumentation with security features to ensure that assets are only exposed to their owners during debug. The features first tag each asset with a unique ID of its owner, authenticate each debugger to verify access privileges, and filter the assets to determine which ones to expose given the debugger privileges. The proposed features incur 6% area and power costs, and do not impact firmware execution during debug.

Original languageEnglish (US)
Title of host publicationInternational Test Conference 2015, ITC 2015 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781467365789
StatePublished - Nov 30 2015
Event46th IEEE International Test Conference, ITC 2015 - Anaheim, United States
Duration: Oct 6 2015Oct 8 2015

Publication series

NameProceedings - International Test Conference
ISSN (Print)1089-3539


Other46th IEEE International Test Conference, ITC 2015
Country/TerritoryUnited States

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Applied Mathematics


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