Securing IJTAG against data-integrity attacks

Rana Elnaggar, Ramesh Karri, Krishnendu Chakrabarty

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The IEEE Std. 1687 (IJTAG) facilitates access to on-chip instruments in complex system-on-chip designs. However, a major security vulnerability in IJTAG has yet to be addressed. IJTAG supports the integration of tapped and wrapped instruments at the IP provider with hidden test-data registers (TDRs). The instruments with hidden TDRs can manipulate the data that is shifted through them. We propose the addition of shadow test-data registers by the trusted IJTAG integrator to protect the shifted data from illegitimate manipulation by malicious third-party IPs. In addition, we use information-flow tracking to identify the modified bits during the attack and the attacking instruments in an IJTAG network. We present security proofs, simulation results and the overheads associated with these countermeasures for various benchmarks.

Original languageEnglish (US)
Title of host publicationProceedings - 2018 IEEE 36th VLSI Test Symposium, VTS 2018
PublisherIEEE Computer Society
Pages1-6
Number of pages6
ISBN (Electronic)9781538637746
DOIs
StatePublished - May 29 2018
Event36th IEEE VLSI Test Symposium, VTS 2018 - San Francisco, United States
Duration: Apr 22 2018Apr 25 2018

Publication series

NameProceedings of the IEEE VLSI Test Symposium
Volume2018-April

Other

Other36th IEEE VLSI Test Symposium, VTS 2018
CountryUnited States
CitySan Francisco
Period4/22/184/25/18

ASJC Scopus subject areas

  • Computer Science Applications
  • Electrical and Electronic Engineering

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  • Cite this

    Elnaggar, R., Karri, R., & Chakrabarty, K. (2018). Securing IJTAG against data-integrity attacks. In Proceedings - 2018 IEEE 36th VLSI Test Symposium, VTS 2018 (pp. 1-6). (Proceedings of the IEEE VLSI Test Symposium; Vol. 2018-April). IEEE Computer Society. https://doi.org/10.1109/VTS.2018.8368642