Securing IJTAG against data-integrity attacks

Rana Elnaggar; Ramesh Karri; Krishnendu Chakrabarty

doi:10.1109/VTS.2018.8368642

Securing IJTAG against data-integrity attacks

Rana Elnaggar, Ramesh Karri, Krishnendu Chakrabarty

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

The IEEE Std. 1687 (IJTAG) facilitates access to on-chip instruments in complex system-on-chip designs. However, a major security vulnerability in IJTAG has yet to be addressed. IJTAG supports the integration of tapped and wrapped instruments at the IP provider with hidden test-data registers (TDRs). The instruments with hidden TDRs can manipulate the data that is shifted through them. We propose the addition of shadow test-data registers by the trusted IJTAG integrator to protect the shifted data from illegitimate manipulation by malicious third-party IPs. In addition, we use information-flow tracking to identify the modified bits during the attack and the attacking instruments in an IJTAG network. We present security proofs, simulation results and the overheads associated with these countermeasures for various benchmarks.

Original language	English (US)
Title of host publication	Proceedings - 2018 IEEE 36th VLSI Test Symposium, VTS 2018
Publisher	IEEE Computer Society
Pages	1-6
Number of pages	6
ISBN (Electronic)	9781538637746
DOIs	https://doi.org/10.1109/VTS.2018.8368642
State	Published - May 29 2018
Event	36th IEEE VLSI Test Symposium, VTS 2018 - San Francisco, United States Duration: Apr 22 2018 → Apr 25 2018

Publication series

Name	Proceedings of the IEEE VLSI Test Symposium
Volume	2018-April

Other

Other	36th IEEE VLSI Test Symposium, VTS 2018
Country/Territory	United States
City	San Francisco
Period	4/22/18 → 4/25/18

ASJC Scopus subject areas

Computer Science Applications
Electrical and Electronic Engineering

Access to Document

10.1109/VTS.2018.8368642

Cite this

@inproceedings{466bce45b0934c61bd5fe61c38a67429,

title = "Securing IJTAG against data-integrity attacks",

abstract = "The IEEE Std. 1687 (IJTAG) facilitates access to on-chip instruments in complex system-on-chip designs. However, a major security vulnerability in IJTAG has yet to be addressed. IJTAG supports the integration of tapped and wrapped instruments at the IP provider with hidden test-data registers (TDRs). The instruments with hidden TDRs can manipulate the data that is shifted through them. We propose the addition of shadow test-data registers by the trusted IJTAG integrator to protect the shifted data from illegitimate manipulation by malicious third-party IPs. In addition, we use information-flow tracking to identify the modified bits during the attack and the attacking instruments in an IJTAG network. We present security proofs, simulation results and the overheads associated with these countermeasures for various benchmarks.",

author = "Rana Elnaggar and Ramesh Karri and Krishnendu Chakrabarty",

note = "Publisher Copyright: {\textcopyright} 2018 IEEE.; 36th IEEE VLSI Test Symposium, VTS 2018 ; Conference date: 22-04-2018 Through 25-04-2018",

year = "2018",

month = may,

day = "29",

doi = "10.1109/VTS.2018.8368642",

language = "English (US)",

series = "Proceedings of the IEEE VLSI Test Symposium",

publisher = "IEEE Computer Society",

pages = "1--6",

booktitle = "Proceedings - 2018 IEEE 36th VLSI Test Symposium, VTS 2018",

}

TY - GEN

T1 - Securing IJTAG against data-integrity attacks

AU - Elnaggar, Rana

AU - Karri, Ramesh

AU - Chakrabarty, Krishnendu

PY - 2018/5/29

Y1 - 2018/5/29

N2 - The IEEE Std. 1687 (IJTAG) facilitates access to on-chip instruments in complex system-on-chip designs. However, a major security vulnerability in IJTAG has yet to be addressed. IJTAG supports the integration of tapped and wrapped instruments at the IP provider with hidden test-data registers (TDRs). The instruments with hidden TDRs can manipulate the data that is shifted through them. We propose the addition of shadow test-data registers by the trusted IJTAG integrator to protect the shifted data from illegitimate manipulation by malicious third-party IPs. In addition, we use information-flow tracking to identify the modified bits during the attack and the attacking instruments in an IJTAG network. We present security proofs, simulation results and the overheads associated with these countermeasures for various benchmarks.

AB - The IEEE Std. 1687 (IJTAG) facilitates access to on-chip instruments in complex system-on-chip designs. However, a major security vulnerability in IJTAG has yet to be addressed. IJTAG supports the integration of tapped and wrapped instruments at the IP provider with hidden test-data registers (TDRs). The instruments with hidden TDRs can manipulate the data that is shifted through them. We propose the addition of shadow test-data registers by the trusted IJTAG integrator to protect the shifted data from illegitimate manipulation by malicious third-party IPs. In addition, we use information-flow tracking to identify the modified bits during the attack and the attacking instruments in an IJTAG network. We present security proofs, simulation results and the overheads associated with these countermeasures for various benchmarks.

UR - http://www.scopus.com/inward/record.url?scp=85048361185&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85048361185&partnerID=8YFLogxK

U2 - 10.1109/VTS.2018.8368642

DO - 10.1109/VTS.2018.8368642

M3 - Conference contribution

AN - SCOPUS:85048361185

T3 - Proceedings of the IEEE VLSI Test Symposium

SP - 1

EP - 6

BT - Proceedings - 2018 IEEE 36th VLSI Test Symposium, VTS 2018

PB - IEEE Computer Society

T2 - 36th IEEE VLSI Test Symposium, VTS 2018

Y2 - 22 April 2018 through 25 April 2018

ER -

Securing IJTAG against data-integrity attacks

Abstract

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