TY - JOUR
T1 - Securing processors against insider attacks
T2 - A circuit-microarchitecture co-design approach
AU - Rajendran, Jeyavijayan
AU - Kanuparthi, Arun Karthik
AU - Karri, Ramesh
AU - Zahran, Mohamed
AU - Addepalli, Sateesh K.
AU - Ormazabal, Gaston
PY - 2013
Y1 - 2013
N2 - A joint circuit-architecture-level design approach is proposed that helps in preventing or detecting Trojan attacks. The performance impact of processor encryption depends on how often the security module is used. If a security module checks the instructions often, then processor encryption will have a high performance impact. The key size used for encryption increases as the detection sensitivity of detection technique increases. Apart from design size, power consumption and path-delays can also be used as metrics for detection sensitivity of a detection technique. Encrypting the entire pipeline will significantly impact processor's performance. Hence, we encrypt only some of the pipeline units depending up on the security modules in the processor. The TrustNet and DataWatch security modules are distributed, and hence multiple units are encrypted.
AB - A joint circuit-architecture-level design approach is proposed that helps in preventing or detecting Trojan attacks. The performance impact of processor encryption depends on how often the security module is used. If a security module checks the instructions often, then processor encryption will have a high performance impact. The key size used for encryption increases as the detection sensitivity of detection technique increases. Apart from design size, power consumption and path-delays can also be used as metrics for detection sensitivity of a detection technique. Encrypting the entire pipeline will significantly impact processor's performance. Hence, we encrypt only some of the pipeline units depending up on the security modules in the processor. The TrustNet and DataWatch security modules are distributed, and hence multiple units are encrypted.
UR - http://www.scopus.com/inward/record.url?scp=84898832558&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84898832558&partnerID=8YFLogxK
U2 - 10.1109/MDAT.2013.2249554
DO - 10.1109/MDAT.2013.2249554
M3 - Article
AN - SCOPUS:84898832558
SN - 2168-2356
VL - 30
SP - 35
EP - 44
JO - IEEE Design and Test
JF - IEEE Design and Test
IS - 2
M1 - 6472275
ER -