TY - GEN
T1 - Security analysis of logic encryption against the most effective side-channel attack
T2 - 28th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015
AU - Yasin, Muhammad
AU - Mazumdar, Bodhisatwa
AU - Ali, Sk Subidh
AU - Sinanoglu, Ozgur
N1 - Publisher Copyright:
© 2015 IEEE.
Copyright:
Copyright 2017 Elsevier B.V., All rights reserved.
PY - 2015/11/2
Y1 - 2015/11/2
N2 - Logic encryption has recently gained interest as a countermeasure against IP piracy and reverse engineering attacks. A secret key is used to lock/encrypt an IC such that the IC will not be functional without being activated with the correct key. Existing attacks against logic encryption are of theoretical and/or algorithmic nature. In this paper, we evaluate for the first time the security of logic encryption against side-channel attacks. We present a differential power analysis attack against random and strong logic encryption techniques. The proposed attack is highly effective against random logic encryption, revealing more than 70% of the key bits correctly in 50% of the circuits. However, in the case of strong logic encryption, which exhibits an inherent DPA-resistance, the attack could reveal more than 50% of the key bits in only 25% of the circuits.
AB - Logic encryption has recently gained interest as a countermeasure against IP piracy and reverse engineering attacks. A secret key is used to lock/encrypt an IC such that the IC will not be functional without being activated with the correct key. Existing attacks against logic encryption are of theoretical and/or algorithmic nature. In this paper, we evaluate for the first time the security of logic encryption against side-channel attacks. We present a differential power analysis attack against random and strong logic encryption techniques. The proposed attack is highly effective against random logic encryption, revealing more than 70% of the key bits correctly in 50% of the circuits. However, in the case of strong logic encryption, which exhibits an inherent DPA-resistance, the attack could reveal more than 50% of the key bits in only 25% of the circuits.
UR - http://www.scopus.com/inward/record.url?scp=84962798396&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84962798396&partnerID=8YFLogxK
U2 - 10.1109/DFT.2015.7315143
DO - 10.1109/DFT.2015.7315143
M3 - Conference contribution
AN - SCOPUS:84962798396
T3 - Proceedings of the 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015
SP - 97
EP - 102
BT - Proceedings of the 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 12 October 2015 through 14 October 2015
ER -