Security challenges during VLSI test

David Hély, Kurt Rosenfeld, Ramesh Karri

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

VLSI testing is a practical requirement, but unless proper care is taken, features that enhance testability can reduce system security. Data confidentiality and intellectual property protection can be breached through testing security breaches. In this paper we review testing security problems, focusing on the scan technique.We then present some countermeasures which have recently been published and we discuss their characteristics.

Original languageEnglish (US)
Title of host publication2011 IEEE 9th International New Circuits and Systems Conference, NEWCAS 2011
Pages486-489
Number of pages4
DOIs
StatePublished - 2011
Event2011 IEEE 9th International New Circuits and Systems Conference, NEWCAS 2011 - Bordeaux, France
Duration: Jun 26 2011Jun 29 2011

Publication series

Name2011 IEEE 9th International New Circuits and Systems Conference, NEWCAS 2011

Other

Other2011 IEEE 9th International New Circuits and Systems Conference, NEWCAS 2011
CountryFrance
CityBordeaux
Period6/26/116/29/11

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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