TY - GEN
T1 - Security challenges during VLSI test
AU - Hély, David
AU - Rosenfeld, Kurt
AU - Karri, Ramesh
PY - 2011
Y1 - 2011
N2 - VLSI testing is a practical requirement, but unless proper care is taken, features that enhance testability can reduce system security. Data confidentiality and intellectual property protection can be breached through testing security breaches. In this paper we review testing security problems, focusing on the scan technique.We then present some countermeasures which have recently been published and we discuss their characteristics.
AB - VLSI testing is a practical requirement, but unless proper care is taken, features that enhance testability can reduce system security. Data confidentiality and intellectual property protection can be breached through testing security breaches. In this paper we review testing security problems, focusing on the scan technique.We then present some countermeasures which have recently been published and we discuss their characteristics.
UR - http://www.scopus.com/inward/record.url?scp=80052516827&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=80052516827&partnerID=8YFLogxK
U2 - 10.1109/NEWCAS.2011.5981325
DO - 10.1109/NEWCAS.2011.5981325
M3 - Conference contribution
AN - SCOPUS:80052516827
SN - 9781612841359
T3 - 2011 IEEE 9th International New Circuits and Systems Conference, NEWCAS 2011
SP - 486
EP - 489
BT - 2011 IEEE 9th International New Circuits and Systems Conference, NEWCAS 2011
T2 - 2011 IEEE 9th International New Circuits and Systems Conference, NEWCAS 2011
Y2 - 26 June 2011 through 29 June 2011
ER -