Security verification of 3rd party intellectual property cores for information leakage

Jeyavijayan Rajendran, A Dhandayuthapany, Ramesh Karri, V Vedula

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Original languageEnglish (US)
Title of host publicationProceedings of IEEE VLSI Design
StatePublished - Jan 2016

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