Shielding heterogeneous MPSoCs from untrustworthy 3PIPs through security-driven task scheduling

Chen Liu, Jeyavijayan Rajendran, Chengmo Yang, Ramesh Karri

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Outsourcing of the various aspects of IC design and fabrication flow strongly questions the classic assumption that 'hardware is trustworthy'. Multiprocessor System-on-Chip (MPSoC) platforms face some of the most demanding security concerns, as they process, store, and communicate sensitive information using third-party intellectual property (3PIP) cores that may be untrustworthy. The complexity of an MPSoC makes it expensive and time consuming to fully analyze and test it during the design stage. Consequently, the trustworthiness of the 3PIP components cannot be ensured. To protect MPSoCs against malicious modifications, we propose to incorporate trojan toleration into MPSoC platforms by revising the task scheduling step of the MPSoC design process. We impose a set of security-driven diversity constraints into the scheduling process, enabling the system to detect the presence of malicious modifications or to mute their effects during application execution. Furthermore, we pose the security-constrained MPSoC task scheduling as a multi-dimensional optimization problem, and propose a set of heuristics to ensure that the introduced security constraints can be fulfilled with minimum performance and hardware overhead.

Original languageEnglish (US)
Title of host publicationProceedings of the 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013
Pages101-106
Number of pages6
DOIs
StatePublished - 2013
Event2013 26th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013 - New York City, NY, United States
Duration: Oct 2 2013Oct 4 2013

Publication series

NameProceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
ISSN (Print)1550-5774

Other

Other2013 26th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013
Country/TerritoryUnited States
CityNew York City, NY
Period10/2/1310/4/13

Keywords

  • Hardware Trojan
  • Heterogeneous MPSoCs
  • Multi-dimension Optimization
  • Security
  • Task Scheduling

ASJC Scopus subject areas

  • General Engineering

Fingerprint

Dive into the research topics of 'Shielding heterogeneous MPSoCs from untrustworthy 3PIPs through security-driven task scheduling'. Together they form a unique fingerprint.

Cite this