TY - GEN
T1 - Side channel analysis of SPARX-64/128
T2 - 11th International Conference on the Theory and Applications of Cryptographic Techniques in africa, Africacrypt 2019
AU - Ramesh, Sumesh Manjunath
AU - AlKhzaimi, Hoda
N1 - Publisher Copyright:
© Springer Nature Switzerland AG 2019.
PY - 2019
Y1 - 2019
N2 - SPARX family of lightweight block cipher was introduced in Asiacrypt 2016. The family consists of three variants (a) SPARX-64/128, (b) SPARX-128/128 and (c) SPARX-128/256. In this work, first, we propose a technique to perform Correlation Power Analysis (CPA) on the SPARX-64/128 cipher. Our technique uses a combination of first-order, second-order and modulo addition CPA methods. Using our proposed technique we extract 128 key bits of SPARX-64/128 cipher with low complexities in general; key guess complexity of 2 12 and 65000 ≈ 2 16 power traces. We initially propose a countermeasure of SPARX-64/128 block cipher against side-channel attacks in terms of power analysis, a threshold implementation based on a serialized design of SPARX-64/128 core. The serialized design of SPARX-64/128 core is implemented in hardware and occupies 60 slices in FPGA. As a countermeasure, this serialized implementation is extended to propose a provably secure threshold implementation of SPARX-64/128 core (TI-SPARX). The TI-SPARX core occupies 131 slices in FPGA and runs at 144Â MHz thus, giving a throughput of 9 Mbps. To the best of our knowledge, this is the first side channel attack and countermeasure result on SPARX-64/128 cipher.
AB - SPARX family of lightweight block cipher was introduced in Asiacrypt 2016. The family consists of three variants (a) SPARX-64/128, (b) SPARX-128/128 and (c) SPARX-128/256. In this work, first, we propose a technique to perform Correlation Power Analysis (CPA) on the SPARX-64/128 cipher. Our technique uses a combination of first-order, second-order and modulo addition CPA methods. Using our proposed technique we extract 128 key bits of SPARX-64/128 cipher with low complexities in general; key guess complexity of 2 12 and 65000 ≈ 2 16 power traces. We initially propose a countermeasure of SPARX-64/128 block cipher against side-channel attacks in terms of power analysis, a threshold implementation based on a serialized design of SPARX-64/128 core. The serialized design of SPARX-64/128 core is implemented in hardware and occupies 60 slices in FPGA. As a countermeasure, this serialized implementation is extended to propose a provably secure threshold implementation of SPARX-64/128 core (TI-SPARX). The TI-SPARX core occupies 131 slices in FPGA and runs at 144Â MHz thus, giving a throughput of 9 Mbps. To the best of our knowledge, this is the first side channel attack and countermeasure result on SPARX-64/128 cipher.
KW - Correlation Power Analysis
KW - Lightweight cryptography
KW - Side channel analysis
KW - SPARX
KW - Threshold implementation
UR - http://www.scopus.com/inward/record.url?scp=85069201949&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85069201949&partnerID=8YFLogxK
U2 - 10.1007/978-3-030-23696-0_18
DO - 10.1007/978-3-030-23696-0_18
M3 - Conference contribution
AN - SCOPUS:85069201949
SN - 9783030236953
T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
SP - 352
EP - 369
BT - Progress in Cryptology – AFRICACRYPT 2019 - 11th International Conference on Cryptology in Africa, Proceedings
A2 - Buchmann, Johannes
A2 - Nitaj, Abderrahmane
A2 - Rachidi, Tajjeeddine
PB - Springer Verlag
Y2 - 9 July 2019 through 11 July 2019
ER -