Simulation and analysis of negative-bias temperature instability aging on power analysis attacks

Xiaofei Guo, Naghmeh Karimi, Francesco Regazzoni, Chenglu Jin, Ramesh Karri

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Transistor aging is an important failure mechanism in nanoscale designs and is a growing concern for the reliability of future systems. Transistor aging results in circuit performance degradation over time and the ultimate circuit failure. Among aging mechanisms, Negative-Bias Temperature Instability (NBTI) has become the leading limiting factor of circuit lifetime. While the impact of transistor aging is well understood from the device point of view, very little is known about its impact on security, and in particular on power analysis attack. This paper fills the gap by evaluating the effects on power analysis attack. Our experimental results obtained using PRESENT algorithm show that CPA attacks are not significantly affected by aging, while the successful rate of template attack changes significantly.

Original languageEnglish (US)
Title of host publicationProceedings of the 2015 IEEE International Symposium on Hardware-Oriented Security and Trust, HOST 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages124-129
Number of pages6
ISBN (Electronic)9781467374200
DOIs
StatePublished - Jun 29 2015
Event2015 IEEE International Symposium on Hardware-Oriented Security and Trust, HOST 2015 - McLean, United States
Duration: May 5 2015May 7 2015

Publication series

NameProceedings of the 2015 IEEE International Symposium on Hardware-Oriented Security and Trust, HOST 2015

Other

Other2015 IEEE International Symposium on Hardware-Oriented Security and Trust, HOST 2015
Country/TerritoryUnited States
CityMcLean
Period5/5/155/7/15

ASJC Scopus subject areas

  • Safety, Risk, Reliability and Quality
  • Hardware and Architecture
  • Electrical and Electronic Engineering

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