SoC-GANs: Energy-Efficient Memory Management for System-on-Chip Generative Adversarial Networks

Generative adversarial networks (GANs) are the most interesting idea to generate synthetic but realistic examples from the original dataset using unsupervised learning, therefore making GANs extremely useful in data generation applications such as text to image synthesis, image classifications, mobile robots and video prediction, to name a few. But GANs are quite computationally expensive due to non-standard convolution operations, such as strided convolution, transposed convolution, and multiple-dimension convolution, involved in it. In this chapter, we discuss our novel 2-D memory array and data re-packaging units, which help accelerating the complex computations of GANs. Our system-on-chip hardware architecture reduces the number of memory read and write accesses in strided convolution by 85% and 75%, respectively, and by 85% and 80%, respectively, in transposed convolution. Consequently, this reduction in on-chip memory accesses leads to enormous energy savings. Overall, our architectural memory enhancements enable about 3.65x performance improvement compared to the state of the art.