SRAM-Based Computing-in-Memory Macro With Fully Parallel One-Step Multibit Computation

Edward Jongyoon Choi, Injun Choi, Chanhee Jeon, Gichan Yun, Donghyeon Yi, Sohmyung Ha, Ik Joon Chang, Minkyu Je

Research output: Contribution to journalArticlepeer-review


In this letter, we present a multibit static random-access memory computing-in-memory (CIM) macro with enhanced energy efficiency for edge devices tasking machine learning (ML) deep neural networks (DNNs). The proposed CIM macro computes matrix-vector multiplications (MVM) in an efficient 'one-step' method reducing the energy consumption and control complexity. Furthermore, the proposed method computes not only the multiplications of a single weight but also the multibit weight with bit-shifting in the charge domain without the use of additional CMOS switches, thereby achieving very high energy efficiency. Measurement results in a 65-nm CMOS prototype chip show that it achieves the highest throughput of 204.8 GOPS at 1.2 V and 133.6 TOPS/W at 0.85 V.

Original languageEnglish (US)
Pages (from-to)234-237
Number of pages4
JournalIEEE Solid-State Circuits Letters
StatePublished - 2022


  • Charge domain computation
  • computing-in-Memory (CIM)
  • convolutional neural network (CNN)
  • mixed-signal computation
  • static random-access memory (SRAM)

ASJC Scopus subject areas

  • Electrical and Electronic Engineering


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