@inproceedings{d0af67be3f3d45ba9938e7b82b6fb3ea,
title = "Statistical thermal evaluation and mitigation techniques for 3D chip-multiprocessors in the presence of process variations",
abstract = "Thermal issues have become critical roadblocks for achieving highly reliable three-dimensional (3D) integrated circuits. This paper performs both the evaluation and mitigation of the impact of leakage power variations on the temperature profile of 3D Chip-Multiprocessors (CMPs). Furthermore, this paper provides a learning-based model to predict the maximum temperature, based on which a simple, yet effective tier-stacking algorithm to mitigate the impact of variations on the temperature profile of 3D CMPs is proposed. Results show that (1) the proposed prediction model achieves more than 98% accuracy, (2) a 4-tier 3D implementation can be more than 40°C hotter than its 2D counterpart and (3) the proposed tier-stacking algorithm significantly improves the thermal yield from 44.4% to 81.1% for a 3D CMP.",
keywords = "3D, chip-multiprocessor, leakage, process variation, regression, stack, statistical learning, thermal, yield",
author = "Juan, {Da Cheng} and Siddharth Garg and Diana Marculescu",
year = "2011",
language = "English (US)",
isbn = "9783981080179",
series = "Proceedings -Design, Automation and Test in Europe, DATE",
pages = "383--388",
booktitle = "Proceedings - Design, Automation and Test in Europe Conference and Exhibition, DATE 2011",
note = "14th Design, Automation and Test in Europe Conference and Exhibition, DATE 2011 ; Conference date: 14-03-2011 Through 18-03-2011",
}