System-level leakage variability mitigation for MPSoC platforms using body-bias islands

Siddharth Garg, Diana Marculescu

Research output: Contribution to journalArticlepeer-review

Abstract

Adaptive body biasing (ABB) is a popularly used technique to mitigate the increasing impact of manufacturing process variations on leakage power dissipation. The efficacy of the ABB technique can be improved by partitioning a design into a number of body-bias islands, each with its individual body-bias voltage. In this paper, we propose a system-level leakage variability mitigation technique to partition a multiprocessor system into body-bias islands at the processing element (PE) granularity at design time, and to optimally assign body-bias voltages to each island post-fabrication. As opposed to prior gate- and circuit-level partitioning techniques that constrain the global clock frequency of the system, we allow each island to run at a different speed and constrain only the relevant system performance metricsin our case the execution deadlines. Experimental results show the efficacy of the proposed methodology; we demonstrate up to 40% and 60% reduction in the mean and standard deviation of leakage power dissipation respectively, compared to a baseline system without ABB. Furthermore, the proposed design-time partitioning is, on average, 38× faster than a previously proposed Monte Carlo-based technique, while providing similar reductions in leakage power dissipation.

Original languageEnglish (US)
Article number6075310
Pages (from-to)2289-2301
Number of pages13
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume20
Issue number12
DOIs
StatePublished - 2012

Keywords

  • Adaptive body-bias (ABB)
  • leakage power dissipation
  • power management
  • process variations

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering

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