TailoredCore: Generating Application-Specific RISC-V-based Cores

Jeferson Gonzalez-Gomez, Steven Avila-Ardon, Jonathan Rojas-Gonzalez, Andres Stephen-Cantillano, Jorge Castro-Godinez, Carlos Salazar-Garcia, Muhammad Shafique, Jorg Henkel

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

One challenge imposed by ubiquitous computing of embedded systems is the need for power and energy-efficient implementations, particularly because many of them are operated with batteries. In this sense, tailored application-specific processors can meet the resource requirements of a specific application in the most efficient way. In this paper, we present TailoredCore, a design methodology to generate application-specific processors based on a core architecture implementation. This methodology analyzes the application to be executed and produces a customized RISC-V core with the resources required, while reducing the hardware overhead due to, for instance, instructions and registers not needed. Using TailoredCore, we achieve up to 38% savings in registers and 12% in logic elements when generating cores for five CHStone benchmark applications and implementing them on an FPGA. These savings in the area also correspond to a reduction of the required power and energy.

Original languageEnglish (US)
Title of host publication2021 IEEE 12th Latin American Symposium on Circuits and Systems, LASCAS 2021
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728176703
DOIs
StatePublished - Feb 21 2021
Event12th IEEE Latin American Symposium on Circuits and Systems, LASCAS 2021 - Arequipa, Peru
Duration: Feb 22 2021Feb 25 2021

Publication series

Name2021 IEEE 12th Latin American Symposium on Circuits and Systems, LASCAS 2021

Conference

Conference12th IEEE Latin American Symposium on Circuits and Systems, LASCAS 2021
Country/TerritoryPeru
CityArequipa
Period2/22/212/25/21

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