TY - GEN
T1 - TAINT
T2 - 35th IEEE International Conference on Computer Design, ICCD 2017
AU - Jyothi, Vinayaka
AU - Krishnamurthy, Prashanth
AU - Khorrami, Farshad
AU - Karri, Ramesh
N1 - Publisher Copyright:
© 2017 IEEE.
PY - 2017/11/22
Y1 - 2017/11/22
N2 - Testing designs implemented in a Field Programmable Gate Array (FPGA) against hardware-based attacks requires one to inject numerous classes of vulnerabilities (e.g., hardware Trojans) into the FPGA based designs. We developed a Tool for Automated INsertion of Trojans (TAINT) providing numerous benefits. First, TAINT can evaluate FPGA based designs against known and unknown attacks. Second, TAINT can insert Trojans at different stages in the FPGA based design cycle such as the Register-Transfer Logic and the post-synthesis translate, map, and route. Moreover, TAINT offers fine-grained controls to a user to precisely insert Trojans in particular FPGA resources. Most importantly, TAINT can automate Trojan Testing. Our experiments will use TAINT to explore the attack spaces at the pre-and post-synthesis stages of a FPGA design.
AB - Testing designs implemented in a Field Programmable Gate Array (FPGA) against hardware-based attacks requires one to inject numerous classes of vulnerabilities (e.g., hardware Trojans) into the FPGA based designs. We developed a Tool for Automated INsertion of Trojans (TAINT) providing numerous benefits. First, TAINT can evaluate FPGA based designs against known and unknown attacks. Second, TAINT can insert Trojans at different stages in the FPGA based design cycle such as the Register-Transfer Logic and the post-synthesis translate, map, and route. Moreover, TAINT offers fine-grained controls to a user to precisely insert Trojans in particular FPGA resources. Most importantly, TAINT can automate Trojan Testing. Our experiments will use TAINT to explore the attack spaces at the pre-and post-synthesis stages of a FPGA design.
KW - Automated Tool
KW - FPGA
KW - Hardware Trojan
KW - Penetration Testing tool
KW - Security
UR - http://www.scopus.com/inward/record.url?scp=85041674880&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85041674880&partnerID=8YFLogxK
U2 - 10.1109/ICCD.2017.95
DO - 10.1109/ICCD.2017.95
M3 - Conference contribution
AN - SCOPUS:85041674880
T3 - Proceedings - 35th IEEE International Conference on Computer Design, ICCD 2017
SP - 545
EP - 548
BT - Proceedings - 35th IEEE International Conference on Computer Design, ICCD 2017
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 5 November 2017 through 8 November 2017
ER -