TY - GEN
T1 - TAO
T2 - 55th Annual Design Automation Conference, DAC 2018
AU - Pilato, Christian
AU - Regazzoni, Francesco
AU - Karri, Ramesh
AU - Garg, Siddharth
N1 - Publisher Copyright:
© 2018 Association for Computing Machinery.
PY - 2018/6/24
Y1 - 2018/6/24
N2 - Intellectual Property (IP) theft costs semiconductor design companies billions of dollars every year. Unauthorized IP copies start from reverse engineering the given chip. Existing techniques to protect against IP theft aim to hide the IC's functionality, but focus on manipulating the HDL descriptions. We propose TAO as a comprehensive solution based on high-level synthesis to raise the abstraction level and apply algorithmic obfuscation automatically. TAO includes several transformations that make the component hard to reverse engineer during chip fabrication, while a key is later inserted to unlock the functionality. Finally, this is a promising approach to obfuscate large-scale designs despite the hardware overhead needed to implement the obfuscation.
AB - Intellectual Property (IP) theft costs semiconductor design companies billions of dollars every year. Unauthorized IP copies start from reverse engineering the given chip. Existing techniques to protect against IP theft aim to hide the IC's functionality, but focus on manipulating the HDL descriptions. We propose TAO as a comprehensive solution based on high-level synthesis to raise the abstraction level and apply algorithmic obfuscation automatically. TAO includes several transformations that make the component hard to reverse engineer during chip fabrication, while a key is later inserted to unlock the functionality. Finally, this is a promising approach to obfuscate large-scale designs despite the hardware overhead needed to implement the obfuscation.
KW - Algorithm-Level Obfuscation
KW - High-Level Synthesis
KW - IP theft
KW - Reverse Engineering
UR - http://www.scopus.com/inward/record.url?scp=85053663185&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85053663185&partnerID=8YFLogxK
U2 - 10.1145/3195970.3196126
DO - 10.1145/3195970.3196126
M3 - Conference contribution
AN - SCOPUS:85053663185
SN - 9781450357005
T3 - Proceedings - Design Automation Conference
BT - Proceedings of the 55th Annual Design Automation Conference, DAC 2018
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 24 June 2018 through 29 June 2018
ER -