Scalability, power-efficiency and shorter time-to-market due to design re-use have favored the adoption of homogeneous multi-core chips with identical processing units (cores) integrated together, offering enhanced computational power. Furthermore, chips with identical cores help cope with increasing defect rates in delivering reasonable yield levels via the utilization of spare cores. In this paper, we propose a comparison-based TAM that is capable of handling spare identical cores; the proposed TAM guarantees the test of a chip through minimum bandwidth in minimum test time, while ensuring no yield loss in the presence of spare identical cores, as its design is driven by the number of spare cores on the chip. The proposed solution also enables the identification of all the good cores in usable chips, supporting models where chips are priced based on number of good cores. We also extend the proposed TAM by adding efficient diagnostic features.