Test data volume comparison: Monolithic vs. modular SoC testing

Ozgur Sinanoglu, Anuja Sehgal, Erik Jan Marinissen, Jeff Fitzgerald, Jeff Rearick

Research output: Contribution to journalArticlepeer-review


Editor's note: Containing production cost is a major concern for today's complex SoCs. One of the key contributors to production cost is test time and test data volume, for which numerous compression techniques were proposed. This article introduces a different approach to test data volume reduction, namely the use of modular test based on IEEE Std 1500 architecture, and it provides modeling, analysis, and quantification to support the proposed approach.

Original languageEnglish (US)
Pages (from-to)25-37
Number of pages13
JournalIEEE Design and Test of Computers
Issue number3
StatePublished - 2009


  • Automatic test pattern generation
  • Computer architecture
  • Flip-flops
  • IEEE Std 1500
  • Logic cores
  • Magnetic cores
  • Modular testing
  • Monolithic testing
  • Pediatrics
  • SoC testing
  • System-on-a-chip
  • Test application time
  • Test data volume

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering


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