Test data volume comparison: Monolithic vs. modular SoC testing

Ozgur Sinanoglu; Anuja Sehgal; Erik Jan Marinissen; Jeff Fitzgerald; Jeff Rearick

doi:10.1109/MDT.2009.65

Test data volume comparison: Monolithic vs. modular SoC testing

Ozgur Sinanoglu, Anuja Sehgal, Erik Jan Marinissen, Jeff Fitzgerald, Jeff Rearick

Research output: Contribution to journal › Article › peer-review

Abstract

Editor's note: Containing production cost is a major concern for today's complex SoCs. One of the key contributors to production cost is test time and test data volume, for which numerous compression techniques were proposed. This article introduces a different approach to test data volume reduction, namely the use of modular test based on IEEE Std 1500 architecture, and it provides modeling, analysis, and quantification to support the proposed approach.

Original language	English (US)
Pages (from-to)	25-37
Number of pages	13
Journal	IEEE Design and Test of Computers
Volume	26
Issue number	3
DOIs	https://doi.org/10.1109/MDT.2009.65
State	Published - 2009

Keywords

Automatic test pattern generation
Computer architecture
Flip-flops
IEEE Std 1500
Logic cores
Magnetic cores
Modular testing
Monolithic testing
Pediatrics
SoC testing
System-on-a-chip
Test application time
Test data volume

ASJC Scopus subject areas

Software
Hardware and Architecture
Electrical and Electronic Engineering

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10.1109/MDT.2009.65

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title = "Test data volume comparison: Monolithic vs. modular SoC testing",

abstract = "Editor's note: Containing production cost is a major concern for today's complex SoCs. One of the key contributors to production cost is test time and test data volume, for which numerous compression techniques were proposed. This article introduces a different approach to test data volume reduction, namely the use of modular test based on IEEE Std 1500 architecture, and it provides modeling, analysis, and quantification to support the proposed approach.",

keywords = "Automatic test pattern generation, Computer architecture, Flip-flops, IEEE Std 1500, Logic cores, Magnetic cores, Modular testing, Monolithic testing, Pediatrics, SoC testing, System-on-a-chip, Test application time, Test data volume",

author = "Ozgur Sinanoglu and Anuja Sehgal and Marinissen, {Erik Jan} and Jeff Fitzgerald and Jeff Rearick",

year = "2009",

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AU - Rearick, Jeff

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KW - Automatic test pattern generation

KW - Computer architecture

KW - Flip-flops

KW - IEEE Std 1500

KW - Logic cores

KW - Magnetic cores

KW - Modular testing

KW - Monolithic testing

KW - Pediatrics

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KW - System-on-a-chip

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Test data volume comparison: Monolithic vs. modular SoC testing

Abstract

Keywords

ASJC Scopus subject areas

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