The Need for Logic Locking

Muhammad Yasin, Jeyavijayan (Jv) Rajendran, Ozgur Sinanoglu

Research output: Chapter in Book/Report/Conference proceedingChapter


The first chapter of the book describes the need for logic locking and how it addresses the hardware security challenges faced by the IC design community. The chapter begins with a description of the globalized IC design flow and the associated security threats. This introduction is followed by a brief description of various design-for-trust countermeasures and their comparison with logic locking in terms of security properties. The chapter ends with a detailed description of logic locking and the associated terminology that will be used throughout this book. Integrated circuits (ICs) are ubiquitous and an essential component in our lives today. ICs at the heart of electronic systems ranging from home appliances and smartphones to satellites and military equipment. ICs serve as the root-of-trust for these systems. The software computations can only be trustworthy if the underlying hardware is reliable and trustworthy [42]. The security of the hardware is, gradually, becoming as important as that of the software, in part due to the emergence of hardware attacks, such as the latest Spectre and Meltdown attacks on Intel processors [23, 29]. The primary reason for many hardware-based attacks, such as reverse engineering or IP piracy, is the profit-driven globalization of the IC design flow. This chapter focuses on logic locking, which is a well-known countermeasure against multiple hardware-based attacks. If we have to summarize logic locking in one sentence, it would be something along the following lines: Logic locking “locks” the functionality of a design until it is unlocked with a secret key. You might be wondering how a design is locked? The high-level answers to this and many other questions that you might have will be provided before the end of this chapter. The specific details of various logic locking algorithms can be found in the subsequent chapters of this book. This chapter is organized as follows. Section 1.1 describes the globalized IC design flow followed by a description of the associated security threats in Sect. 1.2. Section 1.3 presents a summary of the existing design-for-trust (DfTr) countermeasures. Section 1.4 elaborates on the fundamental concepts of logic locking and illustrates how it addresses various hardware security vulnerabilities. The same section also introduces various terms and definitions that are associated with logic locking and will be used throughout this book.

Original languageEnglish (US)
Title of host publicationAnalog Circuits and Signal Processing
Number of pages16
StatePublished - 2020

Publication series

NameAnalog Circuits and Signal Processing
ISSN (Print)1872-082X
ISSN (Electronic)2197-1854

ASJC Scopus subject areas

  • Information Systems
  • Signal Processing
  • Electrical and Electronic Engineering


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