Thermal-aware power budgeting for dark silicon chips

Santiago Pagani, Jian Jia Chen, Muhammad Shafique, Jorg Henkel

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This invited paper summarizes two new steps towards dealing with dark silicon issues: Thermal Safe Power (TSP) and MatEx (both available as open-source tools at http://ces.itec.kit.edu/download). TSP is a novel thermal-aware power budgeting technique, which is namely an abstraction that provides safe power constraints as a function of the number of active cores. TSP conceptually and radically changes the typical design that uses a single and constant value as power budget, e.g., the Thermal Design Power (TDP). Executing cores at power values below TSP results in a higher system performance than state-of-the-art solutions, while the chip's temperature remains below the critical levels.

Original languageEnglish (US)
Title of host publication2015 6th International Green and Sustainable Computing Conference
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781509001729
DOIs
StatePublished - Jan 26 2016
Event6th International Green and Sustainable Computing Conference, IGSC 2015 - Las Vegas, United States
Duration: Dec 14 2015Dec 16 2015

Publication series

Name2015 6th International Green and Sustainable Computing Conference

Other

Other6th International Green and Sustainable Computing Conference, IGSC 2015
CountryUnited States
CityLas Vegas
Period12/14/1512/16/15

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Hardware and Architecture
  • Renewable Energy, Sustainability and the Environment

Fingerprint Dive into the research topics of 'Thermal-aware power budgeting for dark silicon chips'. Together they form a unique fingerprint.

Cite this