TY - GEN
T1 - Transforming between logic locking and IC camouflaging
AU - Yasin, Muhammad
AU - Sinanoglu, Ozgur
N1 - Publisher Copyright:
© 2015 IEEE.
PY - 2016/2/1
Y1 - 2016/2/1
N2 - The globalization of IC design has resulted in security vulnerabilities and trust issues such as piracy, overbuilding, reverse engineering and Hardware Trojans. Logic locking and IC camouflaging are two techniques that help thwart piracy and reverse engineering attacks by making modifications at the netlist level and the layout level, respectively. In this paper, we analyze the similarities and differences among logic locking and IC camouflaging. We p resent methods to transformation camouflaged netlist to its security-equivalent logic locked netlist and vice versa. The proposed transformations enable the switch from one defense technique to the other, and assess and compare the effectiveness of the two techniques using the same set of analysis algorithms and tools.
AB - The globalization of IC design has resulted in security vulnerabilities and trust issues such as piracy, overbuilding, reverse engineering and Hardware Trojans. Logic locking and IC camouflaging are two techniques that help thwart piracy and reverse engineering attacks by making modifications at the netlist level and the layout level, respectively. In this paper, we analyze the similarities and differences among logic locking and IC camouflaging. We p resent methods to transformation camouflaged netlist to its security-equivalent logic locked netlist and vice versa. The proposed transformations enable the switch from one defense technique to the other, and assess and compare the effectiveness of the two techniques using the same set of analysis algorithms and tools.
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U2 - 10.1109/IDT.2015.7396725
DO - 10.1109/IDT.2015.7396725
M3 - Conference contribution
AN - SCOPUS:84969850913
T3 - Proceeding of 2015 10th International Design and Test Symposium, IDT 2015
SP - 1
EP - 4
BT - Proceeding of 2015 10th International Design and Test Symposium, IDT 2015
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 10th IEEE International Design and Test Symposium, IDT 2015
Y2 - 14 December 2015 through 16 December 2015
ER -