TSP: Thermal safe power - Efficient power budgeting for many-core systems in dark silicon

Santiago Pagani, Heba Khdr, Waqaas Munawar, Jian Jia Chen, Muhammad Shafique, Minming Li, Jörg Henkel

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Chip manufacturers provide the Thermal Design Power (TDP) for a specific chip. The cooling solution is designed to dissipate this power level. But because TDP is not necessarily the maximum power that can be applied, chips are operated with Dynamic Thermal Management (DTM) techniques. To avoid excessive triggers of DTM, usually, system designers also use TDP as power constraint. However, using a single and constant value as power constraint, e.g., TDP, can result in big performance losses in many-core systems. Having better power budgeting techniques is a major step towards dealing with the dark silicon problem. This paper presents a new power budget concept, called Thermal Safe Power (TSP), which is an abstraction that provides safe power constraint values as a function of the number of simultaneously operating cores. Executing cores at any power consumption below TSP ensures that DTM is not triggered. TSP can be computed offline for the worst cases, or online for a particular mapping of cores. Our simulations show that using TSP as power constraint results in 50.5% and 14.2% higher average performance, compared to using constant power budgets (both per-chip and per-core) and a boosting technique, respectively. Moreover, TSP results in dark silicon estimations which are more optimistic than estimations using constant power budgets.

Original languageEnglish (US)
Title of host publication2014 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2014
PublisherAssociation for Computing Machinery, Inc
ISBN (Electronic)9781450330510
DOIs
StatePublished - Oct 12 2014
Event2014 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2014 - New Delhi, India
Duration: Oct 12 2014Oct 17 2014

Publication series

Name2014 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2014

Other

Other2014 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2014
CountryIndia
CityNew Delhi
Period10/12/1410/17/14

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture

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