Using one-sided RDMA reads to build a fast, CPU-efficient key-value store

Christopher Mitchell, Yifeng Geng, Jinyang Li

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Recent technological trends indicate that future datacenter networks will incorporate High Performance Computing network features, such as ultra-low latency and CPU bypassing. How can these features be exploited in datacenter-scale systems infrastructure? In this paper, we explore the design of a distributed in-memory key-value store called Pilaf that takes advantage of Remote Direct Memory Access to achieve high performance with low CPU overhead. In Pilaf, clients directly read from the server's memory via RDMA to perform gets, which commonly dominate key-value store workloads. By contrast, put operations are serviced by the server to simplify the task of synchronizing memory accesses. To detect inconsistent RDMA reads with concurrent CPU memory modifications, we introduce the notion of self-verifying data structures that can detect read-write races without client-server coordination. Our experiments show that Pilaf achieves low latency and high throughput while consuming few CPU resources. Specifically, Pilaf can surpass 1.3 million ops/sec (90% gets) using a single CPU core compared with 55K for Memcached and 59K for Redis.

Original languageEnglish (US)
Title of host publicationProceedings of the 2013 USENIX Annual Technical Conference, USENIX ATC 2013
PublisherUSENIX Association
Pages103-114
Number of pages12
ISBN (Electronic)9781931971010
StatePublished - Jan 1 2019
Event2013 USENIX Annual Technical Conference, USENIX ATC 2013 - San Jose, United States
Duration: Jun 26 2013Jun 28 2013

Publication series

NameProceedings of the 2013 USENIX Annual Technical Conference, USENIX ATC 2013

Conference

Conference2013 USENIX Annual Technical Conference, USENIX ATC 2013
CountryUnited States
CitySan Jose
Period6/26/136/28/13

ASJC Scopus subject areas

  • Computer Science(all)

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