Using Static Analysis for Enhancing HLS Security

Luca Collini, Joey Ah-kiow, Christian Pilato, Ramesh Karri, Benjamin Tan

Research output: Contribution to journalArticlepeer-review


Due to the increasing complexity of modern integrated circuits, High-Level Synthesis (HLS) is becoming a key technology in hardware design. HLS uses optimizations to assist during design space exploration. However, some of them can introduce security weaknesses. We propose an approach that leverages static analysis to identify a class of weaknesses in HLS-generated code. We show that some of these weaknesses can be corrected through the automatic generation of HLS directives. We evaluate our approach by comparing the static analysis results with formal verification. Our results show that the static approach has the same accuracy as formal methods while being 3× to 200× faster.

Original languageEnglish (US)
Pages (from-to)1
Number of pages1
JournalIEEE Embedded Systems Letters
StateAccepted/In press - 2023


  • Benchmark testing
  • Ciphers
  • Codes
  • Registers
  • Security
  • Space exploration
  • Static analysis

ASJC Scopus subject areas

  • Control and Systems Engineering
  • General Computer Science


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