What to lock? Functional and parametric locking

Muhammad Yasin, Abhrajit Sengupta, Benjamin Carrion Schafer, Yiorgos Makris, Ozgur Sinanoglu, Jeyavijayan Rajendran

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Logic locking is an intellectual property (IP) protection technique that prevents IP piracy, reverse engineering and overbuilding attacks by the untrusted foundry or end-users. Existing logic locking techniques are all based on locking the functionality; the design/chip is nonfunctional unless the secret key has been loaded. Existing techniques are vulnerable to various attacks, such as sensitization, key-pruning, and signal skew analysis enabled removal attacks. In this paper, we propose a tenacious and traceless logic locking technique, TTlock, that locks functionality and provably withstands all known attacks, such as SAT-based, sensitization, removal, etc. TTLock protects a secret input pattern; the output of a logic cone is ipped for that pattern, where this ip is restored only when the correct key is applied. Experimental results confirm our theoretical expectations that the computational complexity of attacks launched on TTLock grows exponentially with increasing key-size, while the area, power, and delay overhead increases only linearly. In this paper, we also coin "parametric locking," where the design/chip behaves as per its specifications (performance, power, reliability, etc.) only with the secret key in place, and an incorrect key downgrades its parametric characteristics. We discuss objectives and challenges in parametric locking.

Original languageEnglish (US)
Title of host publicationGLSVLSI 2017 - Proceedings of the Great Lakes Symposium on VLSI 2017
PublisherAssociation for Computing Machinery
Pages351-356
Number of pages6
ISBN (Electronic)9781450349727
DOIs
StatePublished - May 10 2017
Event27th Great Lakes Symposium on VLSI, GLSVLSI 2017 - Banff, Canada
Duration: May 10 2017May 12 2017

Publication series

NameProceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI
VolumePart F127756

Other

Other27th Great Lakes Symposium on VLSI, GLSVLSI 2017
CountryCanada
CityBanff
Period5/10/175/12/17

ASJC Scopus subject areas

  • Engineering(all)

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