Wireless powering of mm-scale fully-on-chip neural interfaces

Jiwoong Park; Chul Kim; Abraham Akinin; Sohmyung Ha; Gert Cauwenberghs; Patrick P. Mercier

doi:10.1109/BIOCAS.2017.8325186

Wireless powering of mm-scale fully-on-chip neural interfaces

Jiwoong Park, Chul Kim, Abraham Akinin, Sohmyung Ha, Gert Cauwenberghs, Patrick P. Mercier

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

This paper presents guidelines for the design and optimization of on-chip coils used for wirelessly-powered mm-scale neural implants. Since available real estate is limited, on-chip coil design involves managing difficult trade-offs between the number of turns, trace width and spacing, proximity to other active circuits and metalization, quality factor, matching network performance/size, and load impedance conditions, all towards achieving high power transfer efficiency. To illustrate the design optimization procedure, a 3 × 3 mm² on-chip coil is designed, and measurement results reveal a 3.82 % power transfer efficiency for a 1.6 kΩ load that mimics a 100 μW neural interface.

Original language	English (US)
Title of host publication	2017 IEEE Biomedical Circuits and Systems Conference, BioCAS 2017 - Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	1-4
Number of pages	4
ISBN (Electronic)	9781509058037
DOIs	https://doi.org/10.1109/BIOCAS.2017.8325186
State	Published - Jul 2 2017
Event	2017 IEEE Biomedical Circuits and Systems Conference, BioCAS 2017 - Torino, Italy Duration: Oct 19 2017 → Oct 21 2017

Publication series

Name	2017 IEEE Biomedical Circuits and Systems Conference, BioCAS 2017 - Proceedings
Volume	2018-January

Other

Other	2017 IEEE Biomedical Circuits and Systems Conference, BioCAS 2017
Country/Territory	Italy
City	Torino
Period	10/19/17 → 10/21/17

ASJC Scopus subject areas

Biomedical Engineering
Electrical and Electronic Engineering
Instrumentation

Access to Document

10.1109/BIOCAS.2017.8325186

Cite this

Park, J., Kim, C., Akinin, A., Ha, S., Cauwenberghs, G., & Mercier, P. P. (2017). Wireless powering of mm-scale fully-on-chip neural interfaces. In 2017 IEEE Biomedical Circuits and Systems Conference, BioCAS 2017 - Proceedings (pp. 1-4). (2017 IEEE Biomedical Circuits and Systems Conference, BioCAS 2017 - Proceedings; Vol. 2018-January). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/BIOCAS.2017.8325186

Wireless powering of mm-scale fully-on-chip neural interfaces. / Park, Jiwoong; Kim, Chul; Akinin, Abraham et al.
2017 IEEE Biomedical Circuits and Systems Conference, BioCAS 2017 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2017. p. 1-4 (2017 IEEE Biomedical Circuits and Systems Conference, BioCAS 2017 - Proceedings; Vol. 2018-January).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Park, J, Kim, C, Akinin, A, Ha, S, Cauwenberghs, G & Mercier, PP 2017, Wireless powering of mm-scale fully-on-chip neural interfaces. in 2017 IEEE Biomedical Circuits and Systems Conference, BioCAS 2017 - Proceedings. 2017 IEEE Biomedical Circuits and Systems Conference, BioCAS 2017 - Proceedings, vol. 2018-January, Institute of Electrical and Electronics Engineers Inc., pp. 1-4, 2017 IEEE Biomedical Circuits and Systems Conference, BioCAS 2017, Torino, Italy, 10/19/17. https://doi.org/10.1109/BIOCAS.2017.8325186

Park J, Kim C, Akinin A, Ha S, Cauwenberghs G, Mercier PP. Wireless powering of mm-scale fully-on-chip neural interfaces. In 2017 IEEE Biomedical Circuits and Systems Conference, BioCAS 2017 - Proceedings. Institute of Electrical and Electronics Engineers Inc. 2017. p. 1-4. (2017 IEEE Biomedical Circuits and Systems Conference, BioCAS 2017 - Proceedings). doi: 10.1109/BIOCAS.2017.8325186

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abstract = "This paper presents guidelines for the design and optimization of on-chip coils used for wirelessly-powered mm-scale neural implants. Since available real estate is limited, on-chip coil design involves managing difficult trade-offs between the number of turns, trace width and spacing, proximity to other active circuits and metalization, quality factor, matching network performance/size, and load impedance conditions, all towards achieving high power transfer efficiency. To illustrate the design optimization procedure, a 3 × 3 mm2 on-chip coil is designed, and measurement results reveal a 3.82 % power transfer efficiency for a 1.6 kΩ load that mimics a 100 μW neural interface.",

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Wireless powering of mm-scale fully-on-chip neural interfaces

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